XEN III: Switching and DSP Interface
Time Switch (Highway to DTK)
We have just discussed switching data from the DTK to the Highway side. In this case the data was written sequentially into the PCM memory and read out randomly, i.e. depending on the contents of the Address memory.
For a call to be setup we need to have speech communication in both the directions. Thus the XEN card supports another time switch to switch data from the Highway side to the DTK side. The hardware design for this time switch is similar to the one we have discussed above, the main difference is that writes into the PCM memory are performed from the Highway side by getting the address to be written from the Address memory. The reads are done sequentially by the digital trunk logic. Thus writes are random and reads are sequential.
The diagram above illustrates the time switch, working in the Highway to DTK direction. The main difference here is that the 1-to-4 DEMUX has been replaced by a 4-to-1 MUX. The d11 and d10 bits of the Address memory control the selection of the highway for writing the PCM memory.
The Service Controller (SC) manages service requests for additional resources that might be required for setting up a call. The resources managed by the SC are:
DTMF Receivers for getting digits from the subscribers
Tone Generators for generating various tones required for telephony purposes
HDLC Channels for receiving HDLC messages for signaling
Announcement Banks for feeding appropriate announcements to the subscribers
The SC hardware contains a DSP (Digital Signal Processor) Bank of eight processors. Each DSP has the enough processing power to handle 64 channels. Thus the eight DSPs together provide 512 signal processing channels on the Service Highway. These channels can be used for DTMF tone recognition, R2 signaling (a widely used signaling scheme based on exchange of tones) etc. The DSPs support a shared memory interface for communication between the main CPU and the DSP. This interface will be used for exchanging messages and downloading DSP software. The flexible interface allows DSPs to be loaded with different software for different functions. In the current Xenon architecture, the DSPs will be loaded with DTMF detection software. The DTMF channels will also be capable of generating different tones (dial tone, busy tone etc.) required in telephony.
In addition to the DSP Bank, the SC contains two HDLC controllers, each capable of handling 32 HDLC channels each. The HDLCs can directly insert and extract data from the Service Highway.
Details about slot organization on the service highway are shown below. All the DSPs in the system are currently dedicated to DTMF Receiver in the receive direction for the SC. The transmit direction for the first three slots on DSP-00 are used for tone generation. Sixtly four slots have been assigned to two HDLC controllers. Each HDLC controller handles 32 channels.
|Slot #||Device||Transmit Slot Type||Receive Slot Type|
|0||DSP-0||Dial Tone Generation||DTMF Receiver|
|1||DSP-0||Ring Back Tone Generation||DTMF Receiver|
|2||DSP-0||Busy Tone Generation||DTMF Receiver|
|3 to 63||DSP-0||Idle||DTMF Receiver|
|64 to 127||DSP-1||Idle||DTMF Receiver|
|128 to 191||DSP-2||Idle||DTMF Receiver|
|448 to 511||DSP-8||Idle||DTMF Receiver|
|512 to 543||HDLC-0||HDLC Transmit||HDLC Receive|
|544 to 575||HDLC-1||HDLC Transmit||HDLC Receive|
|576 to 1023||Unassigned||Unassigned||Unassigned|
The DTMF Receiver will be implemented completely in software. The receiver will check for the presence of the two tones associated with DTMF. Based on the sensed tones, it will pass the digits to the main CPU via a message on the shared memory interface. A single DSP will be able to handle 32 such channels.
A DTMF Receiver uses the channel only in one direction. The other direction of the channel is free. This direction will be used for implementing all the tone generators. A tone generator implementation in a PCM system is fairly straight forward. The system just needs to store the PCM samples that will generate the tone. These PCM samples are repeated indefinitely on the slot to generate the tone. There needs to be only one slot for each type of tone, as the same slot can be switched to any number of subscribers.
The two HDLC controllers provide a total of 64 HDLC channels which can be used to implement HDLC based protocols (V5.2, CCS7, X.25 etc.). Any of these 64 channels can be switched to any slot on the XEN processor.